Pavlo Tymoshchuk

Research Expertise

My research project “Spiking K-Winners-Take-All (KWTA) neural circuit and its application for parallel rank order filtering and parallel sorting” was financially supported by the Fulbright Scholar Program Grant. In the project, a continuous-time KWTA neural model has been described that can identify the largest K of N inputs, where the command signal 1<=K<N. The model is given by a differential equation where the spike train is a sum of delta functions. A functional block-diagram of the model includes N feed-forward hard-limiting neurons, and one feedback neuron used to handle input dynamics. The existence and uniqueness of the model steady states has been analyzed, the convergence analysis of the state variable trajectories to the KWTA operation has been proven, the convergence time and number of spikes required have been derived and the processing of time-varying inputs and perturbations of the model nonlinearities have been analyzed. The main advantage of the model is that it is not subject to the intrinsic convergence speed limitations of comparable designs. The model has an arbitrary finite resolution determined by a given parameter, low complexity, and initial condition independence. The model has been applied for parallel sorting and parallel rank-order filtering. Theoretical results have been derived and illustrated with computer-simulated examples that demonstrate the performance of the model.
My current research interest is concerned with designing mathematical models described by differential equations with discontinuous right-hand sides and corresponding difference equations, building on their basis functional block-diagrams of analog and discrete-time NNs, implementation of the networks in a modern software and hardware, and using them in various applications. Specifically, a discrete-time parallel sorting NN is designed. The network is described by a system of difference equations and by output equations. Corresponding functional block-diagrams of the network are constructed. The network has high operation speed, arbitrary finite high resolution of inputs, and it can process unknown finite value inputs located in any known finite range. The network is characterized by moderate computational and hardware implementation complexity and does not require resetting and corresponding supervisory circuits that increases its operation speed. Two simplified versions of the network are derived. Although these versions are slower, they are suitable for parallel sorting of arbitrary finite unknown inputs located in any finite unknown range. Computer simulations confirming theoretical derivations and illustrating performance of the networks are provided.